英伟达施压存储器厂商，探询2026年16层HBM交货可行性

全球半导体观察01-04

随着人工智能（AI）算力需求的爆发式增长，全球AI芯片龙头英伟达（NVIDIA）正准备再次推高全球AI存储器供应链的技术极限。根据市场消息来源，英伟达已正式向主要供应商发出需求，评估最早于2026年第四季交货16层堆叠HBM的可行性，迫使三星电子（Samsung Electronics）、SK海力士（SK hynix）与美光（Micron Technology）加速研发进程，更提前开启了下一代...

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2026","themeId":null,"isJumpTheme":false,"ttsUrl":null,"symbols_score_info":{"2NVD.UK":0.6,"3NVD.UK":0.6,"NVDU":0.6,"NVD2.UK":0.6,"SNVD.UK":0.6,"NVD3.UK":0.6,"NVD":0.6,"NVDS":0.6,"NVIW.SI":0.6,"NVDY":0.6,"NVDD":0.6,"NVDA":1.96,"NVDX":0.6,"NVDS.UK":0.6},"content_text":"随着人工智能（AI）算力需求的爆发式增长，全球AI芯片龙头英伟达（NVIDIA）正准备再次推高全球AI存储器供应链的技术极限。根据市场消息来源，英伟达已正式向主要供应商发出需求，评估最早于2026年第四季交货16层堆叠HBM的可行性，迫使三星电子（Samsung Electronics）、SK海力士（SK hynix）与美光（Micron Technology）加速研发进程，更提前开启了下一代AI芯片的核心零件争夺战。根据韩国媒体报道，目前市场焦点仍集中在12层堆叠HBM4的供应商认证与量产准备上，预计12层堆叠的产品将于2026年初进入全面商业化阶段。然而，英伟达显然不满足于此，近期已经在询问下一代产品的状况。虽然整个计划尚未签署正式合约，但已引发供应商内部的开发时程重新规划，包括良率目标与初始产量设定。部分供应商预计，相关的效能评估最快将于2026年第三季前展开。根据规格与时程的最终定案，这款16层堆叠的产品目前可能仍被归类为HBM4世代，或者是HBM4E世代的范围。韩国半导体工业协会执行副总裁、前SK海力士高层Ahn Ki-hyun指出，英伟达对GPU的升级非常积极，这使得HBM也必须以相同的节奏前进。如果存储器效能跟不上，即使是更高性能的GPU也会失去意义。事实上，从12层推进到16层，其关键并非只是简单的层数堆叠而已，而是半导体封装技术的重大进步。Ahn Ki-hyun强调，从12层到16层堆叠的转换在技术上远比8层到12层堆叠更为艰难，许多情况下必须更换整个制程技术。以目前的规格来分析，从12层堆叠推进到16层堆叠，面临的最大挑战在于封装高度与晶圆厚度上：封装高度限制：全球半导体标准组织JEDEC将HBM4的封装高度限制在775微米，这为传统堆叠方法留下的空间极其有限。晶圆厚度缩减：为了在有限的空间内堆叠更多芯片，业界估计16层堆叠的HBM需要将晶圆厚度从目前12层堆叠设计的50微米，进一步压缩至30微米左右。以上这些物理限制使得封装键合（Bonding）技术成为竞争的核心。目前，三星与美光主要依赖热压键合（TCB）技术，而SK海力士则采用其领先业界的批量回流模制底填（MR-MUF）技术。面对16层HBM的挑战，各大存储器巨头采取了截然不同的技术路径。例如三星方面，当前已经考虑在16层堆叠的产品中导入混合键合（Hybrid Bonding）技术。分析认为，三星之所以选择提前转向混合键合，是因为其在目前的黏合剂技术竞争中难以赶上对手，希望借此新技术实现弯道超车。近期，三星在英伟达的HBM4系统封装（SiP）测试中已获得正面的反馈。至于SK海力士方面，正在调整其发展节奏。虽然该公司也正在开发混合键合作为备选，但其战略重点是尽可能延长其业界领先的MR-MUF技术的寿命。目前，SK海力士已建立HBM4量产框架，并开始向英伟达提供有偿样品。最后在美光方面，虽然在最新进展中较少被提及，但美光仍与三星同样依赖TCB技术，并正努力在16层堆叠的竞赛中保持竞争力。报道强调，这场技术竞赛的关键时间点将与英伟达下一代Rubin架构AI芯片的发表相关，该产品预计于2026年下半年问世。据悉，每颗Rubin架构AI芯片将配备多达8个HBM4芯片，这将极大地拉动对高层数HBM的需求。不过，尽管业界对16层堆叠的HBM4充满期待，但短期内市场重心仍将稳固在HBM3E。（文章来源：科技新报）#英伟达 #SK海力士 #三星电子 #美光 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